This invention relates generally to printed circuit boards and their fabrication and more particularly relates to a multistep all-additive approach to printed circuit board manufacture combined with the sequential use of catalyzed/noncatalyzed resins which are photo definable.
The fabrication of printed circuit boards is generally accomplished by one of two basic techniques. The first technique begins with a copper (or other conductive material) coated substrate and selectively removes the conductive material in accordance with a photo defined masking and etching process defined pattern and chemical etch. The second basic method utilizes the addition of conductive material by way of photodefined patterns to provide properly interconnected conductive runners.
In the construction of a sequentially processed multilayer printed wiring board, as opposed to a laminated multilayer board, each dielectric/conductor layer is applied by a sequence of processes which construct, first, the dielectric, then the vias or interlayer interconnection, then the conductive runners. One such process (process "A" herein) has been defined by Ohsaki et al., of NTT Electrical Communications Laboratories in a paper titled "A Fine-Line Multilayer Substrate with Photo-Sensitive Polyimide Dielectric and Electroless Copper Plated Conductors". A second process (process "B" herein) has been used by E. I. Du Pont de Nemoirs, Inc. Both of these processes use a combination of addition and etching of metals as well as addition and removal of applied dielectric to obtain both conductive runners and the dielectric with conductive holes (vias) which connect runners on one layer with runners above and below. Non-permanent photoresist is a common need of both processes. Processes A and B are typical processes. To provide a single interconnecting layer process "A" utilizes twenty-seven identifiable steps and process "B" utilizes twenty-eight identifiable steps. The useful polyimide circuit made by these processes and having four metal layers would require twenty-seven or twenty-eight steps repeated four times or a total of one hundred twelve steps in the case of process "B". A simpler material system which could reduce the cost by improving yield through process simplicity would be revolutionary. As an example, a four metal layer board with 25 .mu.m to 50 .mu.m lines and padless vias has the interconnectivity of a state of the art fine line laminated multi-layer board (MLB) using 125 .mu.m lines in ten or twelve layers, but four times as large.
While the number of steps in the process "A" and process "B" are similar, the material used and methods of manufacture are entirely different. The process "A" uses photosensitive polyimide and wet chemical processes. Process "B" uses non-photosensitive polyimide with reactive ion etching of the polyimide. Many steps are required in both processes to attain conductor adhesion with polyimide. Process "B" is more costly because a large amount of time is required for the vacuum and ionic processes is required. Both processes are economically limited to line and film thicknesses of less than approximately 10 .mu.m and a physical size of less than approximately 8.6 cm.sup.2. Larger lines and thicknesses are often indicated by functional need.
Both processes, by nature of the resin used, have large variability of dielectric constant as a function of humidity. For example, a 25 .mu.m film thickness and a 25 .mu.m line produces a 50 ohm characteristic impedance transmission line at low humidity when .epsilon.=3.5. The same printed circuit board transmission line would have 40 ohms characteristic impedance at high humidity, when .epsilon.=5.0. Because of the high variability with humidity, electronic circuits realized on a printed circuit board using process "A" or process "B" are usually confined within a sealed package. Transmission line impedance levels higher than 50 ohms are difficult to achieve with the very thin dielectric layers possible with polyimide. Because of these limitations plus inherent manufacturing complexity, it is unlikely that sequential polyimide substrates such as those realized by process A or process B will achieve wide usage other than multi-chip packaging within a cover of a relatively small module.